Discussion:
Au peeling away from Cr adhesion layer
(too old to reply)
Petra Jusková
2008-04-10 13:54:44 UTC
Permalink
We sputter coated 100 mn Cr adhesion layer onto glass wafer.
Using same device, we sputter 500 nm Au layer, directly to Cr.
Then we using spin coater make the final photoresist layer.
After developing, we try to etch gold layer, using TFA ( KI : I2 : H2O,
4:1:40),
but after few seconds, Au layer starts peeling away from the Cr.
Instead of etching, we wash Au layer out.
Can you help us, how to etch Au with desired pattern?

thank you.
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Shay Kaplan
2008-04-10 14:46:28 UTC
Permalink
You must not break the vacuum between Cr and gold deposition
Shay

-----Original Message-----
From: mems-talk-***@memsnet.org [mailto:mems-talk-***@memsnet.org]
On Behalf Of Petra Juskov?
Sent: Thursday, April 10, 2008 3:55 PM
To: mems-***@memsnet.org
Subject: [mems-talk] Au peeling away from Cr adhesion layer

We sputter coated 100 mn Cr adhesion layer onto glass wafer.
Using same device, we sputter 500 nm Au layer, directly to Cr.
Then we using spin coater make the final photoresist layer.
After developing, we try to etch gold layer, using TFA ( KI : I2 : H2O,
4:1:40), but after few seconds, Au layer starts peeling away from the Cr.
Instead of etching, we wash Au layer out.
Can you help us, how to etch Au with desired pattern?

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Erkin Seker
2008-04-10 14:58:35 UTC
Permalink
Also, Cr/Au combination doesn't like iodine-based etch.
Try lift-off if applicable, or replace Cr with Ti.


--On Thursday, April 10, 2008 4:46 PM Shay Kaplan <***@mizur.com> wrote:

> You must not break the vacuum between Cr and gold
> deposition Shay
>
> -----Original Message-----
> From: mems-talk-***@memsnet.org
> [mailto:mems-talk-***@memsnet.org] On Behalf Of Petra
> Juskov?
> Sent: Thursday, April 10, 2008 3:55 PM
> To: mems-***@memsnet.org
> Subject: [mems-talk] Au peeling away from Cr adhesion
> layer
>
> We sputter coated 100 mn Cr adhesion layer onto glass
> wafer. Using same device, we sputter 500 nm Au layer,
> directly to Cr. Then we using spin coater make the final
> photoresist layer. After developing, we try to etch gold
> layer, using TFA ( KI : I2 : H2O, 4:1:40), but after few
> seconds, Au layer starts peeling away from the Cr.
> Instead of etching, we wash Au layer out.
> Can you help us, how to etch Au with desired pattern?
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Ruiz, Marcos Daniel (SENCOE)
2008-04-10 15:20:34 UTC
Permalink
....or use Aqua Regia (HNO3:HCl:DIW = 3:1:3) to etch the gold since it
will not attack the chrome.

Dan

-----Original Message-----
From: mems-talk-***@memsnet.org
[mailto:mems-talk-***@memsnet.org] On Behalf Of Erkin Seker
Sent: Thursday, April 10, 2008 7:59 AM
To: General MEMS discussion
Subject: Re: [mems-talk] Au peeling away from Cr adhesion layer

Also, Cr/Au combination doesn't like iodine-based etch.
Try lift-off if applicable, or replace Cr with Ti.


--On Thursday, April 10, 2008 4:46 PM Shay Kaplan <***@mizur.com>
wrote:

> You must not break the vacuum between Cr and gold deposition Shay
>
> -----Original Message-----
> From: mems-talk-***@memsnet.org
> [mailto:mems-talk-***@memsnet.org] On Behalf Of Petra Juskov?
> Sent: Thursday, April 10, 2008 3:55 PM
> To: mems-***@memsnet.org
> Subject: [mems-talk] Au peeling away from Cr adhesion layer
>
> We sputter coated 100 mn Cr adhesion layer onto glass wafer. Using
> same device, we sputter 500 nm Au layer, directly to Cr. Then we using

> spin coater make the final photoresist layer. After developing, we try

> to etch gold layer, using TFA ( KI : I2 : H2O, 4:1:40), but after few
> seconds, Au layer starts peeling away from the Cr.
> Instead of etching, we wash Au layer out.
> Can you help us, how to etch Au with desired pattern?
_______________________________________________
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Mikael Evander
2008-04-10 15:23:49 UTC
Permalink
Hi.

Does anyone know how common DRIE really is in industry? It seem to
more or less be a fairly common tool in university labs, but is it
actually used in real facilities doing massfabrication as well? I've
always heard that it is slow/expensive and not suited for parallel
processing but the technique should have been refined pretty much
over the years, no?

kind regards

Mikael
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Robert Black
2008-04-10 20:00:33 UTC
Permalink
I don't think DRIE is currently very common in the industry. When(if?) 3-D
Through silicon vias catches on, that will change though.

Robert

-----Original Message-----
From: mems-talk-***@memsnet.org [mailto:mems-talk-***@memsnet.org]
On Behalf Of Mikael Evander
Sent: Thursday, April 10, 2008 10:24 AM
To: General MEMS discussion
Subject: [mems-talk] DRIE in industry?

Hi.

Does anyone know how common DRIE really is in industry? It seem to
more or less be a fairly common tool in university labs, but is it
actually used in real facilities doing massfabrication as well? I've
always heard that it is slow/expensive and not suited for parallel
processing but the technique should have been refined pretty much
over the years, no?

kind regards

Mikael
_______________________________________________
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provider of MEMS and Nanotechnology design and fabrication services.
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p***@umich.edu
2008-04-18 05:48:35 UTC
Permalink
Here is a very recent article on DRIE and MEMS:

http://ap.pennnet.com/display_article/325749/36/ARTCL/none/n-
one/1/DRIE-for-MEMS-devices/

Mike



Quoting Robert Black <r-***@ti.com>:

> I don't think DRIE is currently very common in the industry. When(if?) 3-D
> Through silicon vias catches on, that will change though.
>
> Robert
>
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Albert Henning
2008-04-23 16:39:56 UTC
Permalink
This article is no longer available.

Albert K. Henning, PhD
Director of MEMS Technology
NanoInk, Inc.
215 E. Hacienda Avenue
Campbell, CA 95008
408-379-9069 ext 101
***@nanoink.net

-----Original Message-----
From: ***@umich.edu [mailto:***@umich.edu]
Sent: Thursday, April 17, 2008 10:49 PM
To: mems-***@memsnet.org
Subject: Re: [mems-talk] DRIE in industry?

Here is a very recent article on DRIE and MEMS:

http://ap.pennnet.com/display_article/325749/36/ARTCL/none/n-
one/1/DRIE-for-MEMS-devices/

Mike
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Richard E. Tasker
2008-04-23 18:50:54 UTC
Permalink
It is if you paste the URL back together...

Albert Henning wrote:
> This article is no longer available.
>
> Albert K. Henning, PhD
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Xiaoguang Liu
2008-04-23 20:25:33 UTC
Permalink
http://ap.pennnet.com/display_article/325749/36/ARTCL/none/1/DRIE-for-MEMS-devices/

On Wed, Apr 23, 2008 at 2:50 PM, Richard E. Tasker
<***@astsensors.com> wrote:
> It is if you paste the URL back together...
>
>
> Albert Henning wrote:
>
> > This article is no longer available.
> >
> > Albert K. Henning, PhD

--
Xiaoguang "Leo" Liu
Birck Nanotechnology Center,
Purdue University,
1205 W.State Street, West Lafayette, IN, 47906 USA
***@purdue.edu
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David Nemeth
2008-04-10 15:59:36 UTC
Permalink
Another option is to use either an ion mill, or a plasma etcher with just
argon and the power cranked up high.

-----Original Message-----
From: mems-talk-***@memsnet.org [mailto:mems-talk-***@memsnet.org]
On Behalf Of Erkin Seker
Sent: Thursday, April 10, 2008 10:59 AM
To: General MEMS discussion
Subject: Re: [mems-talk] Au peeling away from Cr adhesion layer

Also, Cr/Au combination doesn't like iodine-based etch.
Try lift-off if applicable, or replace Cr with Ti.


--On Thursday, April 10, 2008 4:46 PM Shay Kaplan <***@mizur.com> wrote:

> You must not break the vacuum between Cr and gold
> deposition Shay
>
> -----Original Message-----
> From: mems-talk-***@memsnet.org
> [mailto:mems-talk-***@memsnet.org] On Behalf Of Petra
> Juskov?
> Sent: Thursday, April 10, 2008 3:55 PM
> To: mems-***@memsnet.org
> Subject: [mems-talk] Au peeling away from Cr adhesion
> layer
>
> We sputter coated 100 mn Cr adhesion layer onto glass
> wafer. Using same device, we sputter 500 nm Au layer,
> directly to Cr. Then we using spin coater make the final
> photoresist layer. After developing, we try to etch gold
> layer, using TFA ( KI : I2 : H2O, 4:1:40), but after few
> seconds, Au layer starts peeling away from the Cr.
> Instead of etching, we wash Au layer out.
> Can you help us, how to etch Au with desired pattern?
_______________________________________________
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provider of MEMS and Nanotechnology design and fabrication services.
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张玉 Zhang Yu, Aaron
2008-04-11 02:06:41 UTC
Permalink
We use just the same process in our lab.
Did you sputter Au right after Cr? How 's the surface condition of the Au layer?
Then which potoresist do you use?
In our lab we spin AZ5214E on to the substrate with Cr and Au sputtered, and
use AZ300MIF to develop it. Finally we use gold etchant (KI:I2:H2O=4:1:80)
to etch. We seldom came across with failure in this process.

On Thu, Apr 10, 2008 at 11:59 PM, David Nemeth <***@sophiawireless.com> wrote:
> Another option is to use either an ion mill, or a plasma etcher with just
> argon and the power cranked up high.
>

--
ZHANG Yu, Aaron
MPhil Candidate,
Centre for Micro and Nano Systems,
Department of Mechanical and Automation Engineering,
The Chinese University of Hong Kong.
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r***@systron.com
2008-04-11 15:49:43 UTC
Permalink
In our process, there is a small co-deposition layer that ensures Cr/Au
adhesion, but we use evaporators and not sputtering systems. Don't know if
you can do that.

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Wilson, Thomas
2008-04-11 16:09:23 UTC
Permalink
As an earlier respondent noted, if one sequentially sputters first Cr (I use
~10 nm) and then Au (I use ~100 nm) in-situ, then any subsequent patterning
with AZ5214E and AZ developer inflicts no damage upon the resulting thin
metallic film. I've thermally cycled such films between room temperature
and 1.6 K over 50 times with no noted visible or electrical deterioration.
(as described in J. Low Temp. Phys. 151 (1/2), 201-205 (April) 2008).

Thomas E. Wilson
Professor of Physics
Marshall University
Science 154
One John Marshall Drive
Huntington, WV 25755-2570

Tel: 304.696.2752
FAX: 304.696.3243

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&quot;gilgunn&quot; &lt;&gt;
2008-04-10 17:45:24 UTC
Permalink
One flavor of DRAM uses a trench of many microns deep to form the storage
capacitor. The trench etch process is a sidewall inhibited DRIE with final
aspect ratio on the order of 30, though absolute depth is not on the scale
of many MEMS process. But it accounts for many millions of parts per year.

Deep trench isolation with similar and smaller aspect ratios are used in
other electronic devices.

-----Original Message-----
From: mems-talk-***@memsnet.org [mailto:mems-talk-***@memsnet.org]
On Behalf Of Mikael Evander
Sent: Thursday, April 10, 2008 11:24 AM
To: General MEMS discussion
Subject: [mems-talk] DRIE in industry?

Hi.

Does anyone know how common DRIE really is in industry? It seem to
more or less be a fairly common tool in university labs, but is it
actually used in real facilities doing massfabrication as well? I've
always heard that it is slow/expensive and not suited for parallel
processing but the technique should have been refined pretty much
over the years, no?
Doug Stewart
2008-04-11 14:26:58 UTC
Permalink
Mikael,
Since we are purchasing a new DRIE tool to supplement our existing
capacity I can tell you the market is definitely growing, especially in
MEMS. Projected market forecasts for the rest of the industry (DRAM,
etc.) I have seen are for a little over $40M for 2008 with an increase
to around $96M by 2011. When you see AMAT and Lam getting into the
business it means they both see growth potential that they want a piece
of. We see more new applications constantly.

Doug Stewart
Fabrication Equipment Manager
Infotonics Technology Corporation
www.infotonics.org

-----Original Message-----
From: Mikael Evander [mailto:***@elmat.lth.se]
Sent: Thursday, April 10, 2008 11:24 AM
To: General MEMS discussion
Subject: [mems-talk] DRIE in industry?

Hi.

Does anyone know how common DRIE really is in industry? It seem to
more or less be a fairly common tool in university labs, but is it
actually used in real facilities doing massfabrication as well? I've
always heard that it is slow/expensive and not suited for parallel
processing but the technique should have been refined pretty much
over the years, no?

kind regards

Mikael

_______________________________________________
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Ahmet Varilci
2008-04-12 07:40:30 UTC
Permalink
Hi
I am using e-beam litography to make holes on PMMA then I need to etch holes on BiSrCaCuO and YBaCuO thin film.
Do anyone know if I can etch 100 nm holes on the BiSrCaCuO and YBaCuO thin film by RIE?
or which method could give better performance for that?
Thanks
Ahmet
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Jie Zou
2008-04-15 02:28:29 UTC
Permalink
My guess would be it's always possible to ion bombard those away? Just
try Ar and tune the bias. Be careful the PMMA lasts longer than the
film.

If the film is really thin, I don't see the reason to go to Deep RIE.

On Sat, Apr 12, 2008 at 3:40 AM, Ahmet Varilci <***@hotmail.com> wrote:
> Hi
> I am using e-beam litography to make holes on PMMA then I need to etch holes on BiSrCaCuO and YBaCuO thin film.
> Do anyone know if I can etch 100 nm holes on the BiSrCaCuO and YBaCuO thin film by RIE?
> or which method could give better performance for that?
> Thanks
> Ahmet

* Zou Jie (Jay)
* Department of Physics
* University of Florida
* Tel: +1-352-846-8018
* Email: ***@gmail.com
* Homepage: http://plaza.ufl.edu/zoujie/
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